PCB layout is very important in the entire pcb design, how to make fast and efficient wiring, and make your PCB layout look tall, it is worth studying and studying. Organize the 7 aspects that need to be paid attention to in the PCB layout. Come and check the missing ones!
First, the common processing of digital circuits and analog circuits
Many PCBs are no longer single-function Electronic Compo
nent(digital or analog circuits), but rather a mixture of digital and analog circuits. Therefore, it is necessary to consider the mutual interference between them when wiring, especially the noise interference on the ground. The frequency
of the digital circuit is high, and the sensitivity of the analog circuit is strong. For the signal line, the high-frequency signal line is as far as possible away from the sensitive analog circuit device. For the ground line, the whole human PCB has only one node to the outside, so The problem of the number of processing and the common mode must be carried out inside the PCB, and the digital ground and the analog ground inside the board are actually separated from each other, but only at the interface
where the PCB is connected to the outside (such as a plug). The digital ground is slightly shorted to the analog ground. Please note that there is only one connection point. There is also no common ground on the PCB, which is determined by the system design.
Second, the signal line is placed on the electrical (ground) layer
In the wiring of multi-layer printed boards, since there are not many lines left in the signal line layer, the addition of layers will cause waste and increase the workload for production, and the cost will increase accordingly. To resolve this contradiction, consider wiring on the electrical (ground) layer. The power
layer should be considered first, followed by the ground layer. Because it is best to preserve the integrity of the formation.
Third, the treatment of connecting legs in large-area conductors
In a large area of grounding (electricity), the legs of common components are connected to them, and the treatment of the connecting legs needs to be comprehensively considered. In terms of electrical performance, the pads of the component legs are perfectly connected with the copper surface, but There are some hidden dangers in the soldering assembly of the components. For example, 1 welding requires a high-power heater. 2 is easy to cause a virtual solder joint. Therefore, taking into account the electrical performance and process needs, making a cross-shaped pad, called heat shield, commonly known as thermal pad, so that the possibility of creating a solder joint due to cross-distribution heat during soldering can be achieved. Sex is greatly reduced. The treatment of the grounding (ground) leg of the multilayer board is the same.
Fourth, the role of the network system in the wiring
In many CAD systems, cabling is determined by the network system. The mesh is too dense, although the path is increased, but the stepping is too small, the data volume of the field is too large, which inevitably has higher requirements on the storage space of the device, and also the computing speed of the object computer electronic product. Great impact. Some of the paths are invalid, such as occupied by the pads of the component legs or occupied by the mounting holes and the holes. The grid is too sparse, and too few paths have a great impact on the throughput rate. So there must be a reasonable grid system to support the wiring. The distance between the legs of the standard components is 0.1 inches (2.54mm), so the basis of the grid system is generally set to 0.1 inches (2.54 mm) or less than 0.1 inches of multiples, such as: 0.05 inches, 0.025 inches, 0.02 Inches and so on.
Five, power, ground processing
Even if the wiring in the entire PCB board is completed well, the interference caused by the inconsistency of the power supply and the ground line may degrade the performance of the product, and sometimes even affect the success rate of the product. Therefore, the wiring of the power supply and the ground wire should be taken seriously, and the noise interference generated by the power supply and the ground wire should be minimized to ensure the quality of the product. For every engineer engaged in the design of electronic products, the reason for the noise between the ground and the power line is known. Now, only the reduced noise suppression is expressed: it is known to add between the power supply and the ground. Tantalum capacitors. Try to widen the power supply and ground line width. It is better to ground the ground line than the power line. Their relationship is: ground line > power line > signal line. Usually the signal line width is 0.2~0.3mm, and the finest width is up to 0.05. ~0.07mm, the power cord is 1.2 to 2.5 mm. For the PCB of the digital circuit, a wide ground wire can be used to form a loop, that is, a ground net is used for use (the ground of the analog circuit cannot be used in this way). A large-area copper layer is used for the ground line, and the printed circuit board is not used. The places are connected to the ground as ground. Or make a multi-layer board, power supply, ground line each occupy a layer.
Sixth, design rule check (DRC)
After the wiring design is completed, it is necessary to carefully check whether the wiring design meets the rules set by the designer, and also to confirm whether the established rules meet the requirements of the printed board production process. The general inspection has the following aspects: line and line, line Whether the distance between the component pad, the wire and the through hole, the component pad and the through hole, and the through hole and the through hole is reasonable, and whether the production requirement is satisfied. Is the width of the power and ground wires appropriate? Is there a tight coupling between the power supply and the ground (low wave impedance)? Is there a place in the PCB where the ground wire can be widened? The best measures are taken for the key signal lines, such as the shortest length, the added protection line, the input line and the output line are clearly separated. Whether the analog circuit and the digital circuit part have separate ground lines. Whether the graphics (such as icons, and markers) added to the PCB will cause a signal short circuit. Modify some undesired line shapes. Is there a process line on the PCB? Does the solder mask meet the requirements of the production process, whether the solder mask size is appropriate, and whether the character mark is pressed on the device pad to avoid affecting the quality of the electrical equipment. Whether the edge of the outer frame of the power ground layer in the multilayer board is reduced, such as the copper foil of the power supply ground layer is exposed outside the board, it is easy to cause a short circuit.
Seven, the design of the via (via)
Via is one of the important components of a multi-layer PCB. The cost of drilling is usually 30% to 40% of the cost of PCB board. Simply put, each hole in the PCB can be called a via. In terms of function, the vias can be divided into two types: one is used as an electrical connection between the layers; the other is used for fixing or positioning the device. In terms of process, vias are generally divided into three categories, namely blind vias, buried vias, and through vias.
The blind vias are located on the top and bottom surfaces of the printed wiring board and have a depth for the connection of the surface wiring to the underlying inner wiring. The depth of the holes usually does not exceed a certain ratio (aperture). Buried hole refers to a connection hole located in the inner layer of the printed wiring board, which does not extend to the surface of the circuit board. The above two types of holes are located in the inner layer of the circuit board, and are completed by a through hole forming process before lamination, and several inner layers may be overlapped during the formation of the via holes. The third type is called a through hole, and the hole passes through the entire circuit board and can be used to implement internal interconnection or as a mounting hole for the component. Since the via is easier to implement in the process and lower in cost, it is used in most printed circuit boards without the need for two other vias. The via holes described below are considered as through holes unless otherwise specified.
1. From a design point of view, a via is mainly composed of two parts, one is a drill hole in the middle, and the other is a pad area around the hole. The size of these two parts determines the size of the vias. Obviously, in high-speed, high-density PCB design, the designer always hopes that the smaller the via, the better, so that more wiring space can be left on the board. In addition, the smaller the via, the parasitic capacitance of its own. The smaller, the more suitable for high speed circuits. However, the reduction in the size of the hole also brings about an increase in cost, and the size of the via hole cannot be reduced indefinitely. It is limited by the process techniques such as drilling and plating: the smaller the hole, the smaller the drill The longer the hole takes, the easier it is to deviate from the center position; and when the depth of the hole exceeds 6 times the diameter of the hole, there is no guarantee that the hole wall can be uniformly plated with copper. For example, the thickness of a normal 6-layer PCB (through-hole depth) is about 50Mil, so PCB manufacturers can provide a minimum diameter of 8Mil.
2. The parasitic capacitance of the via has a parasitic capacitance to the ground. If the via is known to have a diameter of D2 on the ground plane, the diameter of the via pad is D1, and the thickness of the PCB is T. The dielectric constant of the plate substrate is ε, and the parasitic capacitance of the via is similar to: C="1".41εTD1/(D2-D1) The main effect of the parasitic capacitance of the via on the circuit is to prolong the rise of the signal. Time reduces the speed of the circuit. For example, for a PCB with a thickness of 50Mil, if a via with an inner diameter of 10Mil and a pad diameter of 20Mil is used, and the distance between the pad and the ground copper is 32Mil, we can approximate the via by the above formula. The parasitic capacitance is roughly: C=1.41x4.4x0.050x0.020/(0.032-0.020)=0.517pF, and the change in rise time caused by this part of capacitance is: T10-90=2.2C(Z0/2)=2.2 X0.517x (55/2) = 31.28ps. It can be seen from these values that although the effect of the rise and delay caused by the parasitic capacitance of a single via is not obvious, if the vias are used multiple times in the trace for interlayer switching, the designer must carefully consider it.
3. Parasitic inductance of vias Similarly, parasitic inductance exists in vias with parasitic capacitance. In the design of high-speed digital circuits, the parasitic inductance of vias often causes more damage than parasitic capacitance. Its parasitic series inductance weakens the contribution of the bypass capacitor and reduces the filtering effectiveness of the entire power system. We can use the following formula to simply calculate the parasitic inductance of a via approximation: L="5".08h[ln(4h/d)+1] where L is the inductance of the via and h is the length of the via. d is the diameter of the center hole. It can be seen from the equation that the diameter of the via has less influence on the inductance, and the greatest influence on the inductance is the length of the via. Still using the above example, the inductance of the via can be calculated as: L = 5.08 x 0.050 [ln (4x0.050 / 0.010) + 1] = 1.015nH. If the rise time of the signal is 1 ns, then the equivalent impedance is: XL = πL / T10 - 90 = 3.19 Ω. Such impedance can not be ignored in the presence of high-frequency current. It is important to note that the bypass capacitor needs to pass through two vias when connecting the power supply layer and the ground plane, so that the parasitic inductance of the via will be multiplied.
4. Through-hole design in high-speed PCBs Through the above analysis of the parasitic characteristics of vias, we can see that in high-speed PCB design, seemingly simple vias often bring great negatives to the design of the circuit. effect. In order to reduce the adverse effects of the parasitic effects of vias, it is possible to do as much as possible in the design:
1. Consider the cost and signal quality, and choose a reasonable size of the via size. For example, for 6-10 layer memory module PCB design, 10/20Mil (drill/pad) vias are better. For some high-density small-size boards, you can also try 8/18Mil. hole. Under current technical conditions, it is difficult to use smaller size vias. For vias for power or ground, consider using larger sizes to reduce impedance.
2, the two formulas discussed above can be drawn, the use of a thin PCB board is beneficial to reduce the two parasitic parameters of the via.
3. The signal traces on the PCB should not be changed as much as possible, that is, try not to use unnecessary vias.
4. The power and ground pins should be drilled near the hole. The shorter the lead between the via and the pin, the better, because they will lead to an increase in inductance. At the same time, the power and ground leads should be as thick as possible to reduce the impedance.
5. Place some grounded vias near the vias of the signal-changing layer to provide the most recent loop for the signal. It is even possible to place a large number of redundant ground vias on the PCB. Of course, you need to be flexible in design. The via model discussed above is where each layer has pads, and sometimes we can reduce or even remove pads from certain layers. Especially in the case of very large via density, it may cause a broken channel in the copper layer to form a partition circuit. To solve such a problem, in addition to moving the position of the via, we can also consider the via in the copper layer. The pad size is reduced.