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Design of high frequency data interface protection scheme based on ESD protection device

Posted on: 06/12/2022
The continuous development of IC process technology and the popularity of high-speed data transmission interfaces make related ESD protection increasingly difficult. The strong demand for faster processing speed and higher functional density pushes IC manufacturers to further reduce the minimum size of MOS components, especially as the manufacturing technology shifts to below 90nm, IC chips are getting smaller and denser, higher in function and smaller in size. The increasingly complex and harsh electromagnetic environment in which it is used also makes it more susceptible to damage from ESD, overvoltage and overcurrent. At the same time, the continuous development of various high-speed interfaces, especially the rapid growth of portable multimedia devices, makes high-speed data transmission inevitable. How to ensure the high-speed transmission of data while protecting the security of the interface has become a difficult problem faced by high-frequency data interfaces.

Circuit protection requirements for different interfaces

Among the current mainstream interfaces, USB is the most widely used, and the latest USB3.0 will support transmission speeds up to 5Gbps. When the transmission speed is increased to such a high level, the signal holding time is only 200ps. At this time, traditional high-capacitance MLV, TVS and other devices will not be able to be used for ESD protection. High parasitic capacitance will seriously cause signal waveform distortion: it reduces the level of Hold time, so that the rising and falling edges of the signal change greatly, so that the signal cannot reach the normal working level. In contrast, the HDMI1.3 standard doubles the data transfer rate of the earlier HDMI1.0-1.2 to 3.4Gbps per pair of differential signals. To achieve such high data transfer rates, low capacitance and excellent board design will be the key to adequate signal integrity.

The new DisplayPort interface is also being adopted by many PCs, monitors, projectors, and other sources of Display content (playback). The DisplayPort interface operates at speeds up to 2.7Gbps, which is much higher than the original video/multimedia interconnection standard, and therefore faces the same challenges. Hard disk drive, computer and set-top box manufacturers are embracing the E-SATA (External Serial ATA) standard as a fast way to transfer video between storage devices. The latest SATA3.0 standard defines the highest transmission bandwidth as high as 6Gbps. The ESD requirements of E-SATA technology are very similar to those of HDMI and DisplayPort. The hot-plug nature of E-SATA makes high-level ESD protection critical.

Design of high frequency data interface protection scheme based on ESD protection device
Figure 1. Comparison of signal speed requirements for different high-speed interfaces

It can be seen that, for designers, the complexity and difficulty of high-speed interface circuit protection design comes from the working speed, and many designers feel at a loss for various speed expressions.

Taking HDMI1.3 and DisplayPort as examples, HDMI1.3 generally refers to working at a data transmission speed of up to 10Gbps at 340Mpixel/s. The highest transmission speed here means that the interface will change according to the video capabilities of the connected generator and receiver. change its clock rate. The higher the resolution or color depth of the two connected devices, the higher the clock frequency. For example, high-definition video in 1,080p mode has more data to process than in 1,080i mode, and the clock rate is faster. In practice, the speed at which HDMI works depends on the capabilities of the transmitter and receiver, as well as the resolution and color depth of the source. Figure 1 shows the maximum operating speed of the TMDS of the commonly used high-speed interface.

The DisplayPort standard specifies two operating speeds: 1.62GHz and 2.7GHz. Designers can choose lower operating speeds based on specific use and cost factors, while higher speeds allow for faster refresh rates, higher resolutions, and richer color depths.

In some cases it is also possible to implement a design with both speeds. The latest USB 3.0 specification has greatly increased the need for low capacitance ESD devices. USB 3.0 adds two high-speed differential signal pairs to existing USB 2.0. USB 3.0 requires a signal that is 50% faster than DisplayPort because the transmit and receive differential signal pairs can operate up to 5GHz. At this speed, any additional capacitance will affect the eye diagram and thus compliance with the USB 3.0 specification.

The main difficulty in the protection of the above high-speed data transmission interface circuit is that the excessive parasitic capacitance of the protection device will cause a certain degree of signal attenuation, thereby reducing the display quality. Therefore, ESD devices should select ESD devices with sufficiently low capacitance and stable ESD shunt capability according to the signal frequency of the circuit interface they protect, and make trade-offs between component size, ESD protection performance, and convenience of implementation. When adding ESD protection to high-speed data interface circuits, the timing effects of added capacitors and inductors on high-speed differential signals must be considered. When USB 3.0 operates at speeds up to 5GHz, any additional impedance on the line may distort the signal, making it difficult to meet the signal rise time and maintain the signal level in the specified eye diagram.

Choose the right ESD protection device

The timing performance of high-speed signals is typically measured with an eye diagram, an analysis tool used to accurately display timing and evaluate errors. As shown in Figure 2, the gray area in the middle of the eye diagram represents the electrical specifications for high-speed differential signaling. As the lines gradually encroach on the gray portion, the margin of error becomes smaller and smaller. Eye width is an ideal indicator for the settling time of the data line and the presence or absence of error. Eye height indicates signal level or amplitude. Since the TMDS pair is a differential signal, it is very important to minimize the differential capacitance and the signal-to-ground capacitance, so as to ensure that the rise time and fall time of the signal meet the requirements. Ideally, the capacitance is low enough to give the designer enough design margin.

Design of high frequency data interface protection scheme based on ESD protection device
Figure 2 Eye diagram of Tyco electronics 0.25pF PESD device operating at 3.4GHz

In order to meet the requirements of high-speed data communication interface, ESD protection is effective without affecting high-speed signal transmission. In recent years, a variety of devices specially adapted to such protection requirements have been introduced on the market, such as the polymer ESD suppression device PESD from the Raychem Circuit Protection Division of Tyco Electronics, and the low-capacitance silicon-based ESD device SESD. The capacitance of PESD devices is extremely low, with a typical value of 0.25pF, and the leakage current is extremely small (<0.001A); ESD protection is fast and effective, and the price is lower than that of low-capacitance silicon devices. Tyco Electronics’ low-capacitance silicon ESD devices include 0201 package, SESD0201C-006-058 with a typical capacitance of 0.6pF, and 0402 package, SESD0402S-005-054 with a typical capacitance of 0.5pF.

Figure 2 shows the eye diagram performance of Tyco Electronics’ 0.25pF PESD device operating at 3.4GHz (HDMI 1.3). As shown in the figure, when the interface transmission speed is up to 3.4GHz defined by HDMI1.3, the Tyco Electronics PESD During the transmission process of the signal of the electrostatic protection element, there is sufficient margin in the signal rise time, fall time and signal level, which can ensure that the normal transmission of data is not affected.

Low insertion loss and stable capacitance over a wide frequency range are also important in achieving the ultimate goal of adequate protection, cost savings and minimal signal attenuation. Insertion loss is an important indicator to measure the signal attenuation-frequency relationship. Excessive insertion loss reduces device and system bandwidth and imposes additional design constraints on meeting eye levels.

Capacitance and frequency characteristics of ESD protection devices can also affect the design performance of high-speed ports, thereby increasing design constraints. In high-speed systems, circuits designed for a particular capacitor may behave differently depending on the ESD protection method used, forcing designers to use complex software process improvements and capability measurements (SPICE) when conceiving HDMI circuit protection mechanisms. ) models and means of simulation. Figure 3 and Figure 4 show the insertion loss of Tyco Electronics’ two SD devices for high-speed data transmission interface protection E at high-frequency transmission rates.

Design of high frequency data interface protection scheme based on ESD protection device
Figure 3 Insertion loss curve of Tyco Electronics Raychem PESD device

Design of high frequency data interface protection scheme based on ESD protection device
Figure 4 Insertion loss curve of Tyco Electronics Raychem SESD device

Compared with other polymer ESD protection devices, Tyco Electronics’ PESD has the characteristics of lower trigger voltage and clamping voltage, ESD shock resistance, long life, etc. Compared with polymer PESD components, SESD has a slightly higher capacitance (0.6pF) , but its trigger voltage and clamping voltage are relatively lower, and it has better protection for extremely sensitive ICs. These two products launched by Tyco Electronics can completely cover the protection of high-speed data transmission interfaces. Designers can choose according to the protection level, operating frequency of the interface circuit, component size, cost and convenience of implementation. These two series of products use the most popular 0603, 0402 and currently the smallest 0201 packages in the electronics industry, comply with strict RoHS requirements, and can help set-top boxes, laptops, mobile phones and other portable devices to avoid ESD damage.

PPTC overcurrent protection

For safety and regulatory reasons, the HDMI, USB and DisplayPort specifications also require end-user accessible power connectors for overcurrent protection. The overcurrent protection device must be resettable without the user’s mechanical intervention. To prevent malfunction, its preset operating limit must be higher than the allowable transient current. At the same time, the normal resistance of the protection element is required to be low enough to avoid too much voltage drop. Polymeric positive temperature coefficient (PPTC) devices have been demonstrated in a variety of high-speed interface applications. Like traditional fuses, they limit loop current when the current exceeds the specified limit current. However, unlike fuses, PPTCs can be reset after the fault is cleared and power is cycled. The low resistance, fast action time, and small form factor of PPTC devices make them the method of choice for overcurrent protection in many power supply bus architectures.

Unlike HDMI and DisplayPort, USB interface is usually used to provide power, charging and other functions for portable Electronic products. Therefore, downstream devices that use the USB interface for power supply or charging are subject to inductive voltage spikes, faulty chargers, and reverse bias. Tyco Electronics’ polyZen element is a polymer-protected precision Zener diode micro-integrated module consisting of a stable clamping voltage precision Zener diode and a nonlinear polymer PTC (Positive Temperature Coefficient). The low-impedance state transitions to the high-impedance state in response to diode overheating or overcurrent faults. PolyZen components feature resettable protection against high-power fault events while consuming only 0.7W. When a diode overheats or an overcurrent occurs, the PTC “goes on” to limit the current and create a voltage drop that helps protect the Zener diode and the electronics behind it, effectively improving the diode’s power handling capabilities.

Figure 5, Figure 6 and Figure 7 show schematic diagrams of HDMI1.3, USB3.0 and Display port interface protection circuits designed with Tyco Electronics ESD devices, MLV devices, PolySwitch overcurrent protection devices, and PolyZen overcurrent and overvoltage protection devices.

Design of high frequency data interface protection scheme based on ESD protection device
Figure 5 Typical HDMI interface circuit protection scheme design – ESD and overcurrent protection

Design of high frequency data interface protection scheme based on ESD protection device
Figure 6 Typical DisplayPort interface circuit protection scheme design – ESD and overcurrent protection

Design of high frequency data interface protection scheme based on ESD protection device
Figure 7 Typical USB3.0 circuit protection scheme design – ESD, overcurrent and overvoltage protection