Demystifying Level Translation in Inverting Buck-Boost Circuits: Ensuring Seamless Communication and Power Management

Question:

Why is level translation needed?

Answer:

Inverting buck-boost circuits are commonly employed to generate negative supply voltages from positive ones. One critical aspect is ensuring the proper generation of a negative voltage. However, if the supply is controlled or monitored by the main application circuit, a level translation circuit might also be necessary. This circuit references the ground while the GND pin of the inverting buck-boost power supply circuit is connected to the generated negative voltage.

Introduction:

The magnitude of the negative voltage produced by an inverting buck-boost circuit can be either higher or lower than the available positive voltage. For instance, -8V or even -14V can be generated from +12V. When using switch-mode regulator ICs with inverting buck-boost circuits, the system might require design considerations for communication pins. If indeed necessary, designers must undertake adequate level translation to enable the utilization of synchronous and enable signals.

Considerations for Designing Level Translation Circuits:

The inverting buck-boost topology is a fundamental switch-mode regulator topology, requiring just an inductor, two capacitors, and two MOSFET switches. The switches can be driven by any buck regulator or controller. Hence, there are many buck regulator building blocks available. Figure 1 illustrates the inverting topology with all the necessary components.

Figure 1. Inverting buck-boost topology generating negative voltage using a buck regulator

Figure 2 demonstrates a buck-boost circuit with the ADP2386 buck regulator.

If the inverting circuit employs a buck regulator IC, its ground connection should be linked to the point generating the negative voltage. The original output voltage of the buck regulator connects to the system ground. Because the output voltage is tied to the system ground, the ground of the buck regulator itself in the inverting topology serves as the reference for the generated negative voltage. The reference voltage ground of the IC (labeled GND in Figure 2) is not connected to the system ground. Consequently, these two grounds have differing potentials. The ground of the switch-mode regulator IC becomes the generated negative voltage. All the pins on the switch-mode regulator IC are now referenced to the generated negative voltage, not the system ground. Thus, level translation is necessary for communication lines and connections between the system and the IC, in both directions, to ensure secure communication and prevent damage. Typically, relevant signals include SYNC, PGOOD, TRACKING, MODE, EN, UVLO, and RESET. Figure 2 presents an example of a level translation circuit, utilizing two bipolar transistors and seven resistors (colored blue) to generate a signal. This circuit occupies space and adds complexity and cost to the design. All the previously mentioned signals require such level shifters to be individually deployed. When switch-mode regulator ICs utilize digital buses like Power Management Bus (PMBus®), the situation becomes more complex. In such cases, the entire bus connection must incorporate level translation or electrical isolation to function.

Figure 2. External level translation used to power switch-mode regulator IC, achieving synchronization with an external clock。

Switch-mode regulator ICs designed explicitly for inverted voltages eliminate the need for such external circuits. ADI offers a range of switch-mode regulator ICs tailored for inverted voltages, streamlining communication between the system (the entire electronic circuit) and the inverting switch-mode regulator IC. The circuit does not require the use of external level translation structures as depicted in Figure 2.