6R1MBI100P-160 Fuji Electric 1600V 100A IGBT Module

Content last revised on October 23, 2026

6R1MBI100P-160 Fuji Electric PIM IGBT Module

• Manufacturer: Fuji Electric
• Product category: IGBT Module
• Listed voltage class: 1600V; confirm the separate rectifier and IGBT ratings in the module datasheet
• Listed current rating: 100A; confirm the applicable circuit element and rating conditions in the module datasheet
• Integration architecture: PIM bridge plus IGBT
• Isolation voltage: 2500V AC; subject to the specified insulation-test conditions
• Maximum specified junction temperature: 150°C

Start commissioning by isolating and discharging the DC link, verifying the absence of hazardous voltage, protecting the gate terminals from electrostatic discharge, and recording cold-state terminal readings before any energized test. The 6R1MBI100P-160 is a Fuji Electric PIM IGBT module listed in the 1600V, 100A class for bridge-based power conversion where the switching loop, gate-drive return, fuse coordination, and thermal path must be evaluated as one electrical assembly. For this integrated module, do not assume that the bridge and IGBT share the same voltage or current limits.

Its PIM architecture combines a bridge arrangement with an IGBT switching element, which can reduce external component count and help limit the physical area of high-current commutation paths. The listed isolation rating is 2500V AC, while the maximum specified junction temperature is 150°C. The isolation value is a test rating, not a continuous working-voltage rating. Actual power-conversion performance remains dependent on the complete gate driver, cooling system, bus structure, protection network, and switching waveform.

Field Diagnostics and Commissioning for High-Speed Arcing Voltage

Fuse coordination should be checked as a protection-system task rather than treated as a substitute for fast electronic IGBT protection. When a DC-link fault develops, the semiconductor fuse must clear within the energy and time window supported by the complete power stage. Compare the fuse total-clearing I²t with applicable semiconductor I²t limits where these are documented, particularly for the rectifier bridge. IGBT short-circuit protection must be evaluated separately against any documented short-circuit withstand conditions; fuse I²t alone does not establish IGBT protection. Verify that the fuse, busbar, and module terminals share a controlled current path.

During commissioning, inspect the laminated bus arrangement for unnecessary loop area, abrupt conductor offsets, and unrestrained copper sections close to the switching terminals. Stray inductance converts rapid current change into turn-off voltage overshoot, so the practical objective is to minimize the commutation loop and confirm the peak voltage at the module terminals with an appropriately rated differential probe. The measured peak should be assessed against the IGBT’s documented VCES rating and the system’s transient protection strategy, rather than against the nominal AC input or the module’s listed voltage class alone.

A rupture or arc mark around a power terminal requires isolation of the event history before replacement. Check the fuse clearing record, busbar fastening, snubber or clamp network, gate-driver fault log, and DC-link discharge behavior. A replacement module should not be energized until the initiating fault has been addressed. MOVs, capacitors, and other suppression components should be selected as a coordinated network, with their clamping behavior, energy capability, leakage, and placement reviewed under the actual switching waveform.

For technical background on switching behavior, parasitic inductance, gate control, and IGBT failure mechanisms, engineers can consult The Ultimate IGBT Knowledge Base. Fuji Electric’s High-Speed Discrete IGBTs resource also provides useful manufacturer-level context for power semiconductor selection, although discrete-device data should not be substituted for the module’s own ratings.

Bolted Contact Oxidation, Gate Power Integrity, and Replacement Evaluation

Terminal contact condition directly affects conduction loss and local heating. Use a calibrated micro-ohmmeter across each assembled bolted joint after isolating the circuit, and compare equivalent phase connections under the same mechanical condition. If the project specifies a contact resistance below 10µΩ, treat that value as a system assembly acceptance criterion, not as an official internal resistance specification of this module.

Thermographic inspection is most useful when the module is carrying a controlled load and the camera is comparing equivalent terminals, phases, and adjacent busbar surfaces. A localized temperature rise can be associated with contact pressure, surface contamination, conductor imbalance, or current crowding. Recheck the joint after thermal cycling because mechanical relaxation can alter contact behavior. Fasteners, washers, interface surfaces, and the manufacturer’s mechanical instructions should be treated as one assembly requirement.

The gate-drive supply also requires a separate audit. A bootstrap capacitor, where used by the selected driver topology, must support the gate-charge demand of the switching device while covering driver quiescent current, leakage, refresh interval, switching frequency, and voltage droop. The calculation should use the actual driver and gate-charge data rather than a generic capacitor value. High-side drive loss of supply integrity may appear as incomplete turn-on, irregular switching, or repeated protection activation.

The 2MBI50-120 may be reviewed as a separate Fuji Electric module option when the original circuit documentation, voltage class, current requirement, topology, mounting arrangement, and gate-drive behavior are all compatible. It should not be treated as a direct replacement solely from package appearance or current naming. 💡 Bench Tip: Keep the module disconnected from the driver during cold-state diode checks, use an ESD-controlled workstation, and compare readings with a known-good reference before applying any gate signal.

Floating Gate Bias Supply Decoupling and Power Sequencing

Apply the auxiliary gate-drive supplies before the high-voltage DC link, and confirm that every required undervoltage lockout interlock is active before enabling PWM. The gate must never be allowed to float while the collector circuit is energized. A defined off-state bias, selected from the gate-driver and module documentation, helps prevent unintended turn-on caused by Miller coupling and common-emitter inductance.

Keep the gate loop compact, separate the power return from sensitive control references, and place local decoupling at the driver supply pins. Gate-loop parasitic inductance can produce ringing that is mistaken for a logic fault, especially when the power commutation loop is also large. Probe the gate-to-emitter waveform directly at the module terminals and inspect the relationship between gate voltage, collector voltage, and driver fault timing.

In industrial inverter welders and medium-frequency induction-heating supplies, where the module’s topology and ratings suit the intended circuit role, the protection sequence should be tested with the actual DC-link charging path, precharge control, interlock logic, and fault-reset behavior. Verify that a driver fault removes gate drive before the high-voltage bus is applied again. The exact auxiliary supply voltage, negative turn-off level, dead time, and UVLO thresholds are system-dependent values that must be set from the selected driver and the module’s approved operating data.

Transient Dynamics, Active Protection, and Hard-Switching Control

Short-circuit protection must detect the fault quickly enough to keep the IGBT within its documented short-circuit limits, where specified, then turn the device off without creating a destructive inductive overshoot. Do not assume a guaranteed short-circuit withstand time if the module documentation does not provide one. A two-stage soft turn-off strategy can reduce the rate of current collapse during fault interruption: the first stage limits the immediate gate discharge, while the second stage completes turn-off after the collector voltage and current have entered a controlled condition.

Use the protection circuit’s actual propagation delay, desaturation response, gate-driver output capability, and fault-reset timing when evaluating the complete response. The design target should be tied to any documented short-circuit safe operating area and the measured fault waveform, not to a generic switching-time assumption. Oscilloscope traces should capture gate-to-emitter voltage, collector-to-emitter voltage, current through the protected switching path, and the driver fault signal with synchronized timing.

Turn-off overshoot is influenced by DC-link layout, busbar parasitic inductance, gate resistance, Miller plateau charge, clamp behavior, and load current. The IGBT’s documented VCES rating provides its voltage boundary, but it does not remove the need to control the peak at the module terminals. Active clamping may be evaluated where the driver and protection network support it; its threshold, response, and energy path must be validated against the switching waveform and the selected protection components.

When several modules or switching paths operate in parallel, a positive temperature coefficient of on-state voltage can assist static current sharing where the device characteristics show that behavior at the operating point, but dynamic sharing still depends on matched gate-loop impedance, symmetrical bus geometry, driver timing, and thermal coupling. Keep each high-current path physically consistent and verify current balance during controlled switching tests. Any observed imbalance should be investigated through layout, gate-drive timing, terminal contact condition, and thermal measurements before changing the module rating or protection threshold.