IGBT TECH

Peak Performance of Traction Converters: Decoding the XHP™ Platform and .XT Interconnection Technology

Explore how the XHP™ platform and .XT interconnection technology solve CTE mismatch in traction converters, ensuring a 30-year lifespan for railway systems.

The Security Control Hub of Fast Charging Piles: Decoding AURIX™ MCU and Hardware Encryption

Explore how AURIX™ MCUs and embedded HSMs act as the security hub for EV fast chargers, ensuring safe ISO 15118 billing, OTA updates, and component authenticity.

The Vienna Rectifier: Engineering the Backbone of 150 kW+ EV Charging Infrastructure

Explore the Vienna Rectifier topology for 150 kW+ EV charging. Technical analysis of 3-level PFC, low THD, and cost optimization using 600V discrete components.

Unlocking 150 kW+ Charging Efficiency: A Deep Dive into Vienna Rectifier Topologies

Optimize 150 kW+ EV chargers with Vienna Rectifier topology. Deep dive into 3-level PFC efficiency, low harmonics, and cost savings using 600 V discrete components.

Single-Supply Gate Drive for SiC MOSFETs: Feasibility, Limits, and Design Strategies

Meta Description: Can you drive SiC MOSFETs without negative bias? We analyze the feasibility of single-supply (0V turn-off) gate drives, exploring CoolSiC™ threshold stability, Miller effect risks, and the critical "red lines" for reliable design.

Mitigating Parasitic Turn-On (PTO) in SiC MOSFETs: The Critical Role of Miller Capacitance and Threshold Voltage Optimization

Eliminate shoot-through risks in bridge topologies. Deep dive into SiC Parasitic Turn-On mechanisms and how CoolSiC™ technology ensures robust switching without negative bias.

Optimizing Motor Drive Systems: Balancing dv/dt Controllability and Efficiency

Technical analysis of dv/dt controllability in modern IGBT7 motor drives. Learn how to balance switching efficiency with motor insulation protection and extend system lifespan.

Deep Dive into Micro-Pattern Trench (MPT) Technology: The Physics of Loss Suppression in Modern IGBTs

Technical analysis of MPT cell structure in IGBT7. Understand the role of sub-micron mesas, strip layouts, and carrier accumulation in reducing static losses for high-efficiency power drives.

Mastering GaN Power Transistor Design: 5 Keys to Successful High-Efficiency Systems

Master GaN power transistor design with 5 essential engineering keys. Learn to optimize gate drives, minimize loop inductance, and validate high-efficiency systems.

Designing High-Performance GaN Circuits: Mastering Gate Drive, Layout, and Signal Integrity

Master high-performance GaN circuit design. Explore expert strategies for GIT gate driving, minimizing layout inductance, and overcoming CMTI measurement challenges.