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IGBT module inverter circuit design for solar photovoltaic power generation (1)

Solar photovoltaic power generation harnesses sunlight to convert solar energy into electrical energy using solar arrays, specifically PV module squares. The generated direct current (DC) is then transformed into alternating current (AC) through an inverter for user consumption.

Traditionally, photovoltaic power generation systems employed power FET MOSFETs in their inverter circuits. However, as voltages increase, MOSFETs exhibit higher on-resistance, which can lead to increased switching losses in high-voltage and large-capacity systems.

In practical applications, IGBT (insulated-gate bipolar transistor) inverters have gradually replaced power FET MOSFETs due to their ability to handle larger on-state currents, higher forward-reverse configuration voltages, and voltage-controlled switching. IGBTs offer distinct advantages, especially in medium to high-voltage capacity systems.

By utilizing IGBTs as the switching devices in the key circuit of solar photovoltaic power generation, unnecessary losses within the system can be reduced, thereby achieving optimal operating conditions. Consequently, IGBT inverters have become increasingly prevalent in practical solar photovoltaic projects, replacing power FET MOSFETs.


How IGBT inverter works in solar photovoltaic systems

The inverter plays a crucial role in solar photovoltaic systems as it converts the direct current (DC) generated by the solar panels into alternating current (AC) that can be used by the user. It serves as the vital link between solar energy and user consumption.

Understanding the functioning of the inverter circuit is essential for studying the process of solar photovoltaic power generation. In Figure 2(a), a relatively simple push-pull inverter circuit is depicted, comprising power FET MOSFETs.

In this circuit, the neutral tap of the transformer is connected to the positive pole of the power supply, while one end of the MOSFET is connected to the negative pole of the power supply. Through the alternating operation of tubes Q1 and Q2, the circuit ultimately outputs AC power. However, this circuit has limitations in carrying inductive loads and exhibits low transformer efficiency, imposing conditional restrictions on its application.

Figure 2(b) illustrates a full-bridge inverter circuit composed of insulated gate bipolar transistors (IGBTs). In this configuration, Q1 and Q2 are 180° out of phase, and the output AC voltage varies based on the outputs of Q1 and Q2. Q3 and Q4 are simultaneously turned on to form a freewheeling circuit, ensuring that the output voltage waveform remains unaffected by inductive loads. This overcomes the limitations of the push-pull inverter circuit composed of MOSFETs, making the full-bridge inverter with IGBTs more favorable.

The full-bridge inverter circuit with IGBTs finds broader application due to its improved characteristics.

The IGBT is comparable to a MOSFET with an additional P+ region beneath the drain. This additional PN junction gives the IGBT higher voltage resistance when a negative voltage is applied between the collector and emitter. As a result, no current flows between the collector and emitter in the reverse bias state, enhancing the voltage resistance compared to a MOSFET.

Furthermore, the presence of the P+ region allows the IGBT to be in a low-resistance state when turned on, granting it a higher current capacity relative to a MOSFET.

Implementation details: To achieve the desired effects, Rg2 and VD1 are connected in series and then parallel with Rg1. When the IGBT is turned on, the positive voltage from the 3rd leg of the EXB841 in the driving circuit activates VD1, and Rg1 and Rg2 work together due to the reduced total resistance after parallel connection. This decreases switching time and switching loss, resulting in reduced drive loss.

During IGBT turn-off, the 5th pin of the EXB841 is activated while the 3rd pin remains off, providing a negative voltage to the IGBT emitter. This turns off VD1, allowing Rg1 to function alone, while Rg2 remains inactive. This configuration ensures that the resistance between the gates is not too small, preventing device mis-conduction and improving overall efficiency.

  1. Soft switching DC-DC converter circuit: To address switching losses, a soft switching approach is employed. Soft switching refers to minimizing the time when the semiconductor switch is turned on or off, reducing the voltage across the switch to almost zero, and mitigating switching losses.

The phase-shifted full-bridge zero-voltage zero-current PWM soft-switching converter (shown in Figure 4) is utilized. This converter structure, without lossy components, reduces the influence of IGBT tail current, thus minimizing losses and increasing inverter efficiency.

Q1-Q4 represent the four IGBT power switch tubes. Q1 and Q3 are leading arms, while Q2 and Q4 are lagging arms. Q1 and Q3 lead one phase of Q2 and Q4. During the operation, when Q1 and Q4 are turned off, and Q2 and Q3 are turned on, the voltage across UAB equals the voltage across V1. Capacitor C1 charges through supply voltage V1. When Q3 turns off, capacitor C3 charges, and inductor L1 releases energy, causing capacitor C1 to resonate and discharge until the voltage reaches zero, enabling Q1 to conduct with zero voltage. This is the zero-voltage conduction principle for the leading arm Q3.

Similarly, when Q1 and Q4 are turned on and Q2 and Q3 are turned off, the voltage across AB equals the voltage across V1, and capacitor C3 is in the charging state. Continuous turning on of Q1 and Q4 results in resonance between inductor L2 and capacitor C8. Capacitor C8 charges, and when Q1 turns off, capacitor C1 charges, initiating the discharge of C3. The voltage across AB decreases, leading to resonant discharge of C8 until diode D7 continues to flow and the driving pulse of Q4 drops to zero, completing the zero-current turn-off of Q4. The zero-current turn-off principle for the lagging arm Q2 follows a similar pattern.


Implementation details:

The IGBT inverter circuit design also focuses on reducing switching losses, which can be achieved through the use of soft switching technology. Soft switching technology is an alternative to hard switching, which involves minimizing the time during which the semiconductor switch experiences significant voltage and current changes.

In the presented design, a phase-shifted full-bridge zero-voltage zero-current PWM soft-switching converter (depicted in Figure 4) is employed. This converter structure eliminates lossy components, reducing the impact of IGBT tail current and improving overall efficiency.

The converter utilizes four IGBT power switch tubes (Q1-Q4). Q1 and Q3 act as leading arms, while Q2 and Q4 serve as lagging arms. By controlling the switching states of these IGBTs, the desired output voltage is achieved.

During operation, when Q1 and Q4 are turned off and Q2 and Q3 are turned on, the voltage across UAB matches the voltage across V1. Capacitor C1 charges through the supply voltage V1. Upon turning off Q3, capacitor C3 charges, and energy is released from inductor L1, resulting in resonance and discharge of capacitor C1 until its voltage reaches zero. This allows Q1 to conduct with zero voltage, following the zero-voltage conduction principle for the leading arm Q3.

Similarly, when Q1 and Q4 are turned on while Q2 and Q3 are turned off, the voltage across AB matches the voltage across V1, and capacitor C3 enters the charging state. Continuous turning on of Q1 and Q4 leads to resonance between inductor L2 and capacitor C8. Capacitor C8 charges, and upon turning off Q1, capacitor C1 charges, initiating the discharge of C3. The voltage across AB decreases, facilitating resonant discharge of C8 until diode D7 remains conducting and the driving pulse of Q4 drops to zero, completing the zero-current turn-off of Q4. The same principle applies to the zero-current turn-off of the lagging arm Q2.

By implementing these design strategies, the IGBT inverter circuit in solar photovoltaic systems can achieve improved efficiency, reduced losses, and enhanced overall performance.


Hence, the super-arms Q1 and Q3 achieve zero-voltage conduction and turn-off through parallel capacitors C1 and C3, respectively, effectively minimizing switching losses. The lagging arms Q2 and Q4 discharge capacitor C8 through the auxiliary circuit, reducing the primary current flowing through the transformer to zero for zero-current turn-on and turn-off.

To address the issue of harmonic components in the output waveform, an improved circuit utilizing IGBT is presented in Figure 5. This design produces a waveform that closely resembles a sine wave, with minimal total harmonic distortion. Although achieving a perfect sine wave is challenging in practical applications, the design largely meets the required standards. Additionally, the PIC16F873 single-chip microcomputer, equipped with a multi-channel PWM generator, proves its feasibility in generating a desirable output sine wave.

Through device comparison, circuit optimization, and the utilization of the EXB841 integrated circuit with its built-in overcurrent protection, the design simplifies the external circuit and fulfills the IGBT driver circuit requirements. This streamlines the overall design process, making it convenient and straightforward.

Soft switching technology effectively addresses the issues of excessive current during IGBT turn-on and turn-off, significantly reducing drive losses and switching losses in the system. The output waveform is stabilized to resemble a sine wave, enhancing the overall efficiency of the solar photovoltaic system.

The internal structure of the M57962L driver is depicted in the provided figure. To ensure electrical isolation, an optocoupler is utilized, offering fast operation suitable for high-frequency switching applications.

The primary side of the optocoupler incorporates a series current-limiting resistor (approximately 185 Ω), which allows for direct application of 5 V voltage to the input side. The driver employs a dual power supply structure, integrating two 500 V high isolation voltage optocouplers, an overcurrent protection circuit, an overcurrent protection output signal terminal, and a TTL level compatible input interface. The drive electrical signal delay can reach up to 1.5 µs.

In the context of driving IGBTs using the M57962L alone, three important considerations should be taken into account. Firstly, the maximum current rate of change of the driver should be set within the limits of the minimum RG resistance. Using a large RG resistance for many IGBTs can result in increased on-delay time (td(on)), cut-off delay time (td(off)), rise time (tr), and switching losses. Minimizing these losses is crucial for high-frequency applications (above 5 kHz). Additionally, the driver’s own losses must be considered, as excessive losses can lead to overheating and damage.

Lastly, when employing the M57962L to drive high-capacity IGBTs, it is important to note that the driver’s slow turn-off may increase losses. This occurs because the current flowing to the M57962L’s gate through the IGBT’s reverse transfer capacitor (Gres) cannot be absorbed by the driver. The impedance of Gres is not sufficiently low, resulting in slower turn-off times. To address this issue, a larger snubber capacitor is required in the design of the M57962L driver circuit, as illustrated below.


Circuit Description: The power supply decoupling capacitors C2 ~ C7 are aluminum electrolytic capacitors with a capacitance of 100 uF / 50 V. The resistance values in the circuit include R1 (1 kΩ), R2 (1.5 kΩ), and R3 (5.1 kΩ). The power supply module is connected to the 4th and 6th pins of the M57962L, providing positive and negative 15 V power. The logic control signal IN is input to the M57962L driver via the 13th pin.

To prevent breakdown and damage to the IGBT drive circuit, bidirectional voltage regulators Z1 (9.1 V), Z2 (18 V), and Z3 (30 V) are employed. The fast recovery diode FR107 is used as the diode in the circuit.

The IGBT circuit is driven by the IR2110 driver, which operates in a bootstrap driving mode. VD1 serves as the bootstrap diode, and C1 is the bootstrap capacitor. During power-on, C1 is charged by VDt when VT2 is turned on. This circuit is suitable for driving smaller capacity IGBTs. The IR2110 has a protection function that shuts off the driver when the supply voltage is low. The bootstrap drive mode determines the turn-on voltage of VT2, making low voltage protection a necessary condition. Driving the IGBT with a low driving voltage can result in thermal damage. The diode VD1 is selected from options like ERA38-06 and ERB38-06, which are high-speed diodes with a withstand voltage greater than 600V.

An Insulated Gate Bipolar Transistor (IGBT) is a combination of a MOSFET and a bipolar transistor. It offers advantages such as easy driveability of the power MOSFET, simple control, high switching frequency, low on-voltage of the power transistor, high on-state current, and low loss.

The main circuit of the full-bridge inverter consists of essential components such as power switch IGBTs and an intermediate frequency (IF) transformer. Fast recovery diodes VD1VD4 are connected in parallel with IGBT1IGBT4 in reverse, providing protection against reverse current generated by the load.

IGBT1 and IGBT4 form one group, while IGBT2 and IGBT3 form another group. Each group of IGBTs is turned on and off simultaneously. When the excitation pulse signal drives IGBT1, IGBT4, IGBT2, and IGBT3 in sequence, the inverter main circuit converts high DC voltage to a 20 kHz AC voltage. This AC voltage is then sent to the intermediate frequency transformer and output through a step-down rectification filter.

One of the challenges in full-bridge inverters is biasing the IF transformer. Under normal operating conditions, the power switching devices have the same conduction pulse width in both halves of the working cycle, resulting in equal saturation voltage drops. However, if the IGBT drive circuit output pulse width is asymmetrical or due to other reasons, an imbalance between the positive and negative half-cycles may occur.

In such cases, the transformer core can accumulate residual magnetism in a specific half-cycle, leading to a phenomenon called “unidirectional bias.” With a few pulses, the transformer’s unidirectional flux can saturate, rendering the transformer ineffective and causing a short circuit. This poses a significant risk to the IGBTs and can even result in an explosion.

Another drawback of bridge circuits is their susceptibility to shoot-through phenomenon.

Shoot-through refers to the overlapping conduction periods of the IGBTs in the same bridge during the front and rear half-cycles. This results in a high current passing through the IGBTs and the main circuit path.

To address these shortcomings, the designed driving circuit must ensure complete symmetry of the four-way driving waveform, strictly limit the maximum working pulse width, and provide sufficient dead time.

In a full-bridge inverter with a hard-switching trigger mode, the four-way drive circuits are identical, but they must be isolated from each other to prevent interference or false triggering.

The four-way drive signals are divided into two groups based on the trigger phase. Figure 3 depicts a gate drive circuit. Rectifier bridges B1 and B2, along with electrolytic capacitors C1 and C2, form a rectification and filtering circuit that supplies +25V and -15V DC drive voltages to the drive circuit.

The 6N137 optocoupler is used to achieve isolation between the control circuit and the main circuit and transmit the PWM signal.

Resistor R1 and Zener diode VS1 form a PWM sampling signal, while resistor R2 limits the input current of the optocoupler. Resistors R3 and R4, along with voltage regulators VS3 and VS4, create a 5.5V optocoupler level limiting circuit. These components provide driving levels for the optocoupler and MOSFET Q3.

Q3 operates under the control of the optocoupler. MOSFETs Q1 and Q2 form a push-pull amplifier circuit, and the amplified output signal is fed to the IGBT gate to provide a gate drive signal.

When the control signal is input, optocoupler U turns on, turning off Q3 and turning on Q2 to output the +15V driving voltage.

When the control signal is zero, optocoupler U turns off, turning on Q3 and Q1, and the output voltage becomes -15V. This negative bias applied to the gate during IGBT turn-off enhances its anti-interference capability.

Voltage regulators VS3 to VS6 limit the input voltage of Q2 and Q1 to -10V and +15V, respectively, preventing Q1 and Q2 from entering deep saturation, which could impact the MOS tube’s response speed.

Resistors R6 and R7, along with capacitor C0, form a bias network for Q1 and Q2.

Capacitor C0 accelerates the rising current of the drain current of Q2 when it turns on, providing an overshoot current to the gate and expediting gate conduction.

The IGBT gate withstand voltage is typically around ±20V, so the gate is protected by the driver circuit’s output using the parallel resistor Rge and reverse series limiting regulator.

The gate series resistance Rg significantly influences the IGBT turn-on process. Rg should be small to speed up turn-off speed and reduce turn-off loss. However, if it is too small, it can cause a large di/dt and result in a significant collector voltage spike.

For this design’s specific requirements, Rg is selected as 4.7Ω.

The gate wiring’s parasitic inductance and the parasitic capacitance between the gate and the emitter can generate oscillating voltage. To minimize this effect, the gate lead should be transmitted using twisted pairs and kept as short as possible, preferably not exceeding 0.5 m, to reduce wiring inductance.